The present application claims priority to Korean Patent Application No. 2001-15966 filed Mar. 27, 2001.
(Not Applicable)
Semiconductor chips are typically enclosed in a sealing part that provides protection from hostile environments and enables the semiconductor chip to be electrically connected to a component such as a motherboard. The semiconductor chip, in combination with the sealing part, is typically referred to as a semiconductor package, with the elements of such package including a lead frame, a semiconductor chip, conductive wires, and the hard sealing part. The lead frame is the central supporting structure of the package, with a portion of the lead frame being internal to the sealing part. Some portions of the leads of the lead frame extend from the sealing part and are used to connect the package externally.
In general, a conventional lead frame for a semiconductor package is manufactured by mechanically stamping or chemically etching a continuous metal strip such as one fabricated from copper, a copper alloy, or other metal material. The lead frame serves a dual purpose by acting as a lead connecting the semiconductor chip to an external circuit (e.g., a motherboard) and as a frame which fixes the semiconductor chip on the motherboard at the same time.
A deficiency of conventional lead frames in those semiconductor packages including the same is that many of the leads of the lead frame cannot be used for signal transmission in that they must be used for providing ground to the semiconductor chip. More particularly, the semiconductor chip includes not only input-output pads for power supply and/or signal transmission, but also a plurality of input-output pads for ground. The input-output pads for ground are themselves bonded to respective ones of the leads by the conductive wires, thus preventing the usage of such leads for signal transmission.
To supplement the number of leads for signal transmission (i.e., to add additional signal leads), the leads of the lead frame must be finely pitched. However, such fine pitching is not preferable due to the resultant increases in manufacturing cost. Another alternative that has been developed to supplement the number of signal leads involves a manufacturing method wherein the general size of the lead frame is enlarged. However, the use of an enlarged lead frame necessarily results in an increased volume or enlargement of the semiconductor package incorporating such lead frame. Such semiconductor package fails to satisfy or meet the trend of light, thin, small and short semiconductor package products.
In another attempt to address the problem of insufficient numbers of signal leads, there has been developed a semiconductor package fabrication methodology wherein the conductive wire(s) for ground is/are directly bonded to a peripheral or circumferential portion of the top surface of the chip mounting board or die pad of the lead frame instead of one or more of the leads. During the wire bonding process, the lead frame is typically located on a substantially planar upper surface of a heat block which generates intense heat. The lead frame is fixed to the heat block through the use of a clamp. Subsequent to such affixation, the wire bonding process is performed. However, since the peripheral portion of the top surface of the die pad is not typically in direct contact with the heat block, a severe bouncing phenomenon occurs during the wire bonding process, thereby considerably reducing the yield rate or efficacy of the wire bonding. The bouncing phenomenon occurs as a result of contact with a capillary during the bonding process, and adversely affects the same.
In accordance with the present invention, there is provided a semiconductor package including a lead frame comprising a frame including both a ground ring and a chip mounting board located therein. Extending between the ground ring and the chip mounting board are a plurality of elongate slots or apertures. The ground ring is formed to include recesses within the bottom surface thereof which create regions of reduced thickness. A semiconductor chip bonded to the chip mounting board may be electrically connected to leads of the lead frame and to the ground ring via conductive wires. Those conductive wires extending to the ground ring are bonded to the top surface thereof at locations which are not aligned with the recesses within the bottom surface, i.e., those regions of the ground ring of maximum thickness.
In the lead frame of the present semiconductor package, the ground ring is supported within the frame, and the chip mounting board supported within the ground ring by one or more tie bars which are connected to and extend between the frame, the ground ring, and the chip mounting board. The chip mounting board, the ground ring, the tie bars, the leads, the semiconductor chip, and the conductive wires are at least partially encapsulated by a sealing part. Within the sealing part, certain surfaces of the chip mounting board, the tie bars, the ground ring, and the leads are exposed. The completion of the semiconductor package is facilitated by a saw singulation process wherein excess portions of the lead frame outside the sealing part are removed.
The present invention is best understood by reference to the following detailed description when read in conjunction with the accompanying drawings.